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An innovation for prevention latchup,pseudo-latchup path method,has been put forward that is based on latchup effects of bulk-Si CMOS devices.

从体硅CMOS锁效应入手,提出了抑制一种新方法—伪锁路径法。

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95 Abstract With the rapid development of the IC manufacture, the critical dimension(CD) of the manufacturable CMOS technology has been put into 90nm, even 65nm and below from 130nm.

摘 要 随着IC制造快速发展,可量产CMOS,其特征线宽也由0.13um 进入了90nm甚至65nm及以下。

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The setup and hold times, why are they even there? How can we find out how high they are? The logic gates are nowadays built most of the time, again, in so-called CMOS technology.

设置和保持时间,为什么它还在那里?我才能道它高?如今,逻辑门大部分时间都是采用所谓的 CMOS 技术构建的。

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