So, today, we built a piece of SRAM - Static Random-Access Memory – which uses latches.

所以，今天，我们构建一块静态随机存取存储——SRAM，它锁存。

This is called a " latch" because it " latches onto" a particular value and stays that way.

这被称为“锁存”，因为它会“锁定”一个特定的值并保持不变。

Now we can put a 1 on the data line to save the value 1 to our latch.

现在我们可以将数据线上的值设为1，以将值1保存到我们的锁存中。

To write to our register, we first have to enable all of the latches.

要向寄存写入数据，我们首先必须启所有的锁存。

Luckily we only need 1 wire to enable all the latches, but that’s still 129 wires.

幸运的是我们只需要一根线来启所有的锁存，但那仍然是129根线。

To activate any one latch, we must turn on the corresponding row AND column wire.

要激活任何一个锁存，我们必须打的行和列线。

For 256 bits, we need a 16 by 16 grid of latches with 16 rows and columns of wires.

于256比特，我们需要一个16乘16的锁存网格，包含16行和16列的电线。

So we can use this signal to uniquely select a single latch.

所以我们可以这个信号来唯一选择一个锁存。

The key to making this a useful piece of memory is to combine our two circuits into what is called the AND-OR Latch.

将这两个电路组合成所谓的与或锁存，是这段内存变得有的关键。

That should only ever be true for one single latch at any given time.

那在任何时刻都只会单一的一个锁存成立。

So the address for the particular latch we just used can be written as 11001000.

所以，我们刚刚的那个锁存的地址可以写成11001000。

The latch we just saved our one bit into has an address of row 12 and column 8.

我们刚刚保存一个比特的锁存，其地址是第12行第8列。

By adding a few extra logic gates, we can build this circuit, which is called a Gated Latch since the " gate" can be opened or closed.

通过添加几个额外的逻辑门，我们可以构建这个电路，它被称为门控锁存，因为这个“门”可以打或关闭。

We only want the latch at the intersection of the two active wires to be enabled, but all of the other latches should stay disabled.

我们只想让两条活跃线路交叉处的锁存启，而其他所有的锁存都该保持禁状态。

A group of latches operating like this is called a register, which holds a single number, and the number of bits in a register is called its width.

像这样运作的一组锁存称为寄存，它存放一个单一的数字，而寄存中比特的数量称为其宽度。

We can use the same trick with a read enable wire to read the data later, to get the data out of one specific latch.

我们可以相同的技巧，通过一根读能线在稍后读取数据，从而从一个特定的锁存中获取数据。

Because only one latch will ever be write enabled, only one will ever save the data -- the rest of the latches will simply ignore values on the data wire because they are not write enabled.

因为只有一个锁存会被启写入，所以只有它会保存数据——其余的锁存会忽略数据线上的值，因为它们没有被启写入。

We don’t want to have to deal with all the individual logic gates... so as before, we’re going to bump up a level of abstraction, and put our whole Gated Latch circuit in a box -- a box that stores one bit.

我们不想处理所有单独的逻辑门… … 所以和以前一样，我们将提高抽象级别，并将整个门控锁存电路放在一个盒子里——一个存储的盒子一点。