A resistance macromodel for deep-submicron process epi-type substrate based on the 2D device simulation is presented.
摘要提出了一种基于二维器件
拟的深亚微米工艺外延
衬底的电阻
。
式A resistance macromodel for deep-submicron process epi-type substrate based on the 2D device simulation is presented.
摘要提出了一种基于二维器件拟的深亚微米工艺外延衬底的电阻。
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